04-02-2022, 01:36 PM
Hi All.
I've just posted an update on the Classic-Plus / 256TC-Plus in regards to sorting out the FPGA.
As in the post above, I did start re-entering the logic design into Xilinx ISE before deciding to make
the change to using Lattice's ECP5 FPGA instead.
More details here :
https://microbeetechnology.com.au/forum/...65#pid1165
I've just posted an update on the Classic-Plus / 256TC-Plus in regards to sorting out the FPGA.
As in the post above, I did start re-entering the logic design into Xilinx ISE before deciding to make
the change to using Lattice's ECP5 FPGA instead.
More details here :
https://microbeetechnology.com.au/forum/...65#pid1165