System 80 RAM Expansion

[CheshireNoir]

Hi Folks,
I guess I'm ready for this to see the light of day...
https://github.com/cheshirenoir/System80RamBoard
This is a design for a simple 32K RAM expansion for the System 80. The idea is if I can get this working, I'll use it as a springboard for a 4020 replacement down the track
(Assuming I can work out what will be needed by that. The Disk Drive unit scares me.)

Now, make no assumptions that I know what I am doing. I do not. 

This is the most complex project I have ever worked on. I have no idea if my assumptions about what needs to be asserted are correct. There could be flaws in a) My logic, b) my understanding of what the System 80 needs and c) what the SRAM chip I have chosen expects.

Please feel free to look at, tear apart and generally give feedback on this, assuming you are interested.
Yes I know I could replace the internal RAM with 4164 RAM and expand it that way, but that won't get me to my eventual goal of having a modern 4020 replacement.

If it all looks sane, I'll probably get a run of 5 made in the new year. I learned a lot of stuff to even get here.

It's all in KiCAD 7, but there is a PDF if you wanted to skip all that stuff.

Cheers, and thanks in advance for everyone who has a look.

John

[ChickenMan]

Personally I would replace the internal RAM with 4164 RAM and when the 4020 eventuates, dont populate its ram. The current 16k gets expanded to 48k with the 32k in the 4020 via 2 x 50 way plugs crimped to 6" of 50 way flat cable. To me, thats prone to problems.

[CheshireNoir]

Yeah, these are designed to clip directly to the edge connector sticking out the back, to avoid that cable length issue.
I realised after I'd posted that there's no smoothing caps or a reservoir capacitor to be seen. D'oh!
I know the System 80s do occasionally turn up, but they usually are like mine: Just a standard 16k unit with only tape.
I really want 48k and a drive interface (So I can add a Gotek) and I suspect everyone with a new (At least to them) System 80 will be in the same boat.

If I can get the RAM expander working, I'll probably do a second revision with a 50 pin header so I can just add the FDD directly to the back of this one.

All part of the plan :-)

John

[someone]

Hi John,
it looks like you’ve had fun & invested a fair bit of time into it.
Someone would start just using the SRAM and a glue logic GAL(reprogrammable PAL).
Then if needed add the buffers.
To simplify the PCB design, why not use a 74xx640 transceiver for the data bus and 74xx541 the address bus?

Good Luck and cheers

Someone

[CheshireNoir]

Thanks someone.
I'll look at the 640 and 541.
I've never touched GALs, other than programming the odd one or two for other people's systems.

Cheers!

John

[someone]

GALs are very easy to use particularly for memory address decoding.
What memory range does the 32K RAM occupy?

[CheshireNoir]

It sits in the upper 32K. From 8000 to FFFF.
(it's a very neat layout)

Chesh

[someone]

It sits in the upper 32K. From 8000 to FFFF.
(it's a very neat layout)

Chesh

Ta,
The GAL (PALASM) equations would be very simple,  something like:
RAMCS := A15 * MREQ
RAMOE := RD
RAMWR := WR 

Note: The pins are assigned as /RAMCS, /RAMOE, /RAMWR, /MREQ, /RD, /WR & A15 to get the correct logic sense.

So simple that you might get away just using a 74xx00.

[CheshireNoir]

Sorry for taking so long to get back to you, someone,
I ended up with a much more complicated logic than your suggested logic. (I included my logic tables in the document)
I think a lot of my logic was around isolating the bus when it wasn't in use, which may be an incorrect assumption on my end.

JOhn

[CheshireNoir]

Ah cheers! That simplifies things :-D

John