VIBEDRONE BEEWOLF 1024 8.07-Queen803  -  SYSTEM MANIFEST
BUILD     
SOURCE    single HTML file, GPLv3, (c) 2026 Graham Upshall
ROMS      not included - supply your own legally obtained images
Portions (c) and (tm) Microbee Technology Pty Ltd. Hobbyist use only.

MODELS  (chosen at the launch screen)
PC85 ROM      Premium PC85: BASIC 5.29e ROM A + B, CHARROM,
              PAK slots C E F G H I, NET socket (D)
PREMIUM CF    Premium CF / PCF, 1024K: CF boot ROM, CF card image,
              optional floppies

PROCESSOR
CPU           Z80, ZEXDOC passed
Interrupts    IM2 vectored via PIO A then PIO B (A has priority), CF and PC85
              IM0 / IM1 go to 0038h
PIO poll      every 256 T-states

SPEED   (GT button cycles, slider scales 1-100%)
2 MHz         40,000 T per 20 ms tick
3.375 MHz     67,500 T per tick      default, button reads "GT"
5 MHz (GT)    100,000 T per tick     button reads "GT ok"
6.75 MHz      135,000 T per tick     speed and CPU/render profile in GT tooltip
Timing        50 ticks per second, 12 ms CPU budget per call,
              unfinished ticks resume; backlog capped at 250 ms. All timing is in T-states.

MEMORY MAP  (Premium CF)
0000-7FFF     RAM, 32K window onto 1024K = 32 banks (port 50h)
8000-9FFF     CF boot ROM, 8K  (RAM when ROM disabled)
8000-8FFF     VDU instead, when port 50h bit 4 is set
A000-EFFF     RAM (the upper 32K is always bank 0)
F000-F7FF     screen RAM | attribute RAM | CHARROM (port 0Bh bit 0)
F800-FFFF     PCG | colour RAM (port 08h bit 6)
Power-on      RAM filled 00 FF alternating

Port 50h      bits 0,1 = bank bits 0-1 (bit 1 XOR bit 2)
              bits 5,6,7 = bank bits 2,3,4 (32 banks)
              bit 2 ROM off   bit 3 video RAM off
              bit 4 VDU at 8000h   (bit 5 no longer ROM select)
Port 51h      latched, adds no banks

VIDEO
Controller    6545-style register file, 32 bytes, write masks,
              R16/R17 light-pen latch
Text modes    64 x 16 default, 80 columns when R1 is 80 or more
              rows from R6 (1-32), 8 x 16 cells
PCG           CF mode 32K (16 banks x 2K), PC85 16K (8 banks), fixed.
              CPU bank bits need 1C bit 7. Absent banks read 0,
              ignore writes, draw as a space
Other RAM     2K attribute, 2K colour, 2K screen
Colour        16-colour palette, COLOUR picker
              colour byte: low nibble ink, high nibble paper
              ORDER (in COLOUR): MICROBEE = bit 0 red, bit 2 blue (default on CF)
              CGA = bit 0 blue; AUTO = Microbee only if byte 0090h is 0
              (default on PC85). Byte 00 shows green on black
              dark yellow is olive (AAAA00) as on a real Premium, not CGA brown
80-col font   second half of a 4K CHARROM, else derived from 64-col
Frame         108 x 313 characters x 2 T = 67,608 T
              about 49.9 Hz at 3.375 MHz
Sync          status bit 5 = vertical blank, computed from R4 R5 R6 R9
              (never shorter than 15% of the frame)
              PIO B bit 7 = VSYNC pulse (R7 position, R3 width) when PB7:VSYNC

I/O PORTS  (Premium CF)
00 01         PIO A data / control
02 03         PIO B data / control
              out bit 6 = speaker, in bit 7 = RTC IRQ / vsync / pull-up (PB7 button),
              in bit 4 = serial RX, bits 2-3 = mouse
04 06 07      RTC address / write / read
08            colour / PCG select
0B            CHARROM select, light-pen gate
0C 0D         CRTC address / data
18  1C        PCG bank (1C bits 0-3, used when bit 7 set), attribute select (1C bit 4)
1F            bit 0 latched
44-47         WD2793: command/status, track, sector, data
48            floppy latch / side status
50  51        RAM bank / latch
60-67  70     ATA task file / device control

STORAGE
CF card       ATA PIO: IDENTIFY, SET FEATURES, READ, WRITE, SEEK
              geometry 304 / 4 / 32
              busy, DRQ and sector-gap timing in T-states
Partitions    MBR 55AA, type DB (CP/M), up to 4 = drives A to D
              4096-byte blocks, 512 directory entries, 32K reserved
              block counts 1203 / 1270 / 1270 / 1628
Floppy        WD2793, MFM 250 kbit/s = 108 T per byte, lost data modelled
              Type I, II, IV and Read Address supported
              Read / Write Track not supported
              DS40 (40x2), SS80 (80x1), DS80 DS82 DS84 DS8B (80x2)
              all 10 x 512 byte sectors, raw and CPCEMU containers
              raw .ds8 / .ds80 / .ds84 / .ds40 / .ss8 files are accepted, .ds8 = DS80
              DS80 .DSK: switches to physical cyl/side when a sector ID only
              matches physically (uBee CP/M 3 boots; 8.01)
F-BOOT        holds F at cold boot, released at the first floppy read
FOLDER        8.3 files, 700K max, read-only DS80 data disk on E:
FOLDER B      the same, but into floppy drive B (CP/M 3 B:), drive A untouched (8.04)
EXPORT        CF card image; if none is loaded it saves the hard disk, else floppy A (8.05)
SAVE FLOPPY   .DSK disks download as CPCEMU .dsk with every write (sector IDs kept, so
              a CP/M 3 disk boots again); raw disks download raw.  SAVE FLOPPY B = drive B
              the same files are the uBee512 "host" for HOST2CPM (8.02)
RTC           battery RAM bytes 14/15 = 55h/AAh at power-on (uBee CP/M 3 "clock already set"
              signature) and its 1-Jan-78 default is ignored, so CP/M 3 shows the PC time (8.03)
Port FFh      uBee512 tools API: ID string, version 6.0.0, Unix host,
              host file read + directory, EXITEMU (message), VSCREST (no-op),
              UBSCRIPT options (none). No CPM2HOST (host writes).
              (not bootable - no system tracks)
SWITCH B:     hot-swap B: original / partition 5 / partition 6
EXPORT        download the CF image, filename increments
Files needed  CHARROM 4K, CF ROM 8K (BN56CF / PCF), CF image,
              optional .dsk - all cached once loaded

INPUT
Keyboard      Premium matrix via CRTC light-pen raster match
Mouse         1: packets into the MOUSE.SYS queue (E6EC-E6F4),
                 5 bytes, 25 ms sampling
              2: bit-banged PIO B frames, 3 bytes x 9 bits,
                 2812.5 T per bit = 1200 baud
Other         KBD (on-screen keyboard), PASTE

MODEM  (Viatel / videotex)
MODEM         1200 baud receive, 75 baud transmit, bit-banged on PIO B
              (out bit 5 = TX, in bit 4 = RX), RX is 7 data bits + even parity
Gateway       vtx_gateway.js (node, no dependencies): WebSocket to TCP
              Shift-click MODEM and enter
              ws://localhost:8765/?host=glasstty.com&port=6502
Flow control  PB2 ready holds back received bytes only once a program has
              driven PB2 high; programs that never do (Viatel 2.3a) receive freely
Connect       Ctrl-click MODEM (Cmd-click on a Mac) connects the gateway at
              once, for ROMs with no DIAL command (Viatel 2.3a: press V)
Keyboard      with MODEM on, a key chord (e.g. Shift + key) is held until the
              kernel has read the key, then Shift / Ctrl stay down until the
              kernel has probed them (FUZIX reads Shift after the key is up)

PB7 / VSYNC
PC85          default PB7:VSYNC. The ROM arms PIO B (mode 3, bit 7 only,
              IM2 vector 8Ah); its ISR calls a PAK / NET ROM at E003h when
              E000h holds a JP (C3h): a 50 Hz tick, pseudo real-time clock
CF            default PB7:RTC. VSYNC is selectable, disk interface
              is polled: a 50 Hz interrupt during a floppy transfer loses
              data (about 40% of test reads failed), so software must mask
              interrupts around disk access
Real board    a jumper picks one of RTC, Network Direction (output) or
              VSYNC for PB7. Some boards have no link, or a wire instead

OPERATING SYSTEMS
CP/M          Microbee 2.2 CF partitions, drives A to D 

MULTI-OS boots from CF image
FUZIX         forked .5 model with Microbee games and utilities
COLLAPSE      minimal Forth OS
Contiki       internet aware OS
ZSDOS         NZCOM built from resources @ gaby.de
CP/M 3        Caldera build from MSPP with VT52 and VT100 extensions 
	      including modded Mallard Basic

SOUND
Speaker       1-bit, PIO B bit 6, edge-timestamped into WebAudio
              gain 0.6, about 20 Hz high-pass, adopts AI models
Key click     auto-silenced once the Shell has initialised

CLOCK
RTC           64-byte, follows the host clock, BCD or binary, 12/24 h
              periodic / update-ended / alarm flags, IRQ on PIO B bit 7

SNAPSHOTS AND DUMPS
SNAP          CF: .cf1024, VDCFSNAP v2, bytes
              (older .cf400 snapshots load)
              CPU registers, ports 50 51 08 1C, PIO A and B,
              CRTC registers, PCG + attribute + colour + screen RAM,
              full 1024K RAM
              PC85 uses .400
Title bee     click = RAMALL.BIN full dump, shift-click = RAM64K.BIN
              CF and PC85 both dump; the state holds registers, PIO (with
              its control-write log), CRTC, keyboard, modem and ROM slots

BUTTONS
Hover         buttons shows short explanation
All           HARDWARE  GT / SPEED  PASTE  PAUSE  RESET
              SNAP  LOAD.400  SCREEN  PNG
HARDWARE      popup: COLOUR  KBD  KEY TRACE  PB7  and MOUSE (CF only)
CF only       FLOPPY  F-BOOT  FOLDER  EXPORT  SWITCH B:
PC85 only     ROMS  ROM SLOTS  LOAD  SAVE

HONEST GAPS
- Floppy Read / Write Track (WD2793 Type III) not supported
- FOLDER mount is a synthesised CP/M disk, read-only
- Status bit 5 vblank is never shorter than 15% of the frame (real blank in
  tall modes such as 80x25 is about 12%)
- PB7 Network Direction (output) jumper option is not modelled
- 6.75 MHz depends on the host: a slower machine runs below it (achieved MHz and overdue work show in the GT tooltip)
- Telstar can echo typed characters at column 0 after a wrong page number
  (server behaviour, reported upstream), the same on PC85 Videotex ROM